As semiconductor process technology advances to provide circuit devices and interconnects having smaller dimensions, circuit supply voltage and parasitic capacitance of circuit nodes may be reduced, leading to a decrease in signal charge. Signal charge may represent information. As a result, reliability issues may arise because alpha particles and cosmic rays may change stored charge to a sufficient degree so as to corrupt the information stored on circuit nodes. Such events are commonly called soft errors. Furthermore, an increase in the number of circuit nodes per die may also increase the rate of soft errors.
Consider a computer system, such as that illustrated in FIG. 1. In FIG. 1, microprocessor 102 comprises many sub-blocks, such as arithmetic logic unit (ALU) 104 and on-chip cache 106. Microprocessor 102 may also communicate to other levels of cache, such as off-chip cache 108. Higher memory hierarchy levels, such as system memory 110, are accessed via host bus 112 and chipset 114. In addition, other off-chip functional units, such as graphics accelerator 116 and network interface controller (NIC) 118, to name just a few, may communicate with microprocessor 102 via appropriate busses or ports.
Among the most sensitive circuits in a computer system are memory circuits and latches. In particular, high-performance dynamic gates are often used in the critical paths of a microprocessor. The input noise margin of a dynamic gate is often smaller than that of a static CMOS (Complementary Metal Oxide Semiconductor) gate, and dynamic gates make use of pre-charged internal nodes, which may be susceptible to soft errors. With clock frequencies and the number of pipeline levels increasing, the number of logic stages between latch boundaries is decreasing. As a result, noise transients due to soft errors may propagate to a latch boundary and be captured, which may lead to an incorrect result in a microprocessor or computer system.